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High-Speed ADC-MS8601

Product Overview:

The MS8601 is a dual-channel, 10-bit, 1.0 GSPS high-speed ADC integrating two independent 10-bit ADC cores operating at up to 1.0 GSPS. Each channel includes its own DDR data clock (DCLKI and DCLKQ). When both ADC channels are enabled, DCLKI and DCLKQ remain phase-aligned, allowing the system to use either clock for data acquisition across both channels.

The device supports an AutoSync feature for multi-device synchronization. This enables automatic synchronization across multiple ADCs on the same board, as well as across multiple boards in cascaded configurations.

The MS8601 features a programmable output format that supports both offset binary and two’s complement, offering flexibility for various system requirements. Data is output through a parallel LVDS interface, with a minimum conversion latency of 26 ns. The device supports both Demux and Non-Demux output modes. In Demux mode, two 10-bit LVDS buses output data in parallel, effectively reducing the data rate on each bus by half, thereby enhancing compatibility with a wider range of data receiver devices.

Based on a proprietary architecture developed in-house, the MS8601 achieves excellent dynamic performance while maintaining a low power consumption of less than 2.3 W.

The device is packaged in a plastic BGA292 and supports a wide operating temperature range of −40°C to +105°C.

  • Product Details

Functional Block Diagram

Product Highlights:

    • Package and pinout fully compatible with the reference model ADC10D1000, enabling seamless pin-to-pin replacement.
    • Optimized for low power consumption—approximately 56% of the reference device, eliminating the need for a heatsink.
    • 25% shorter conversion latency compared to the reference device, improving overall system responsiveness.
    • Wider operating temperature range, offering better environmental adaptability.
    • Supports multi-chip AutoSync synchronization; dedicated acquisition IP available for streamlined system integration.

 

Key Features:

    • Full-Power Bandwidth: 2.4 GHz
    • Conversion Latency: 26 master clock cycles
    • Static Performance:
     — DNL: –0.8 LSB to+1.2LSB
     —INL: –2.5 LSB to +2.8 LSB
  • Dynamic Performance (fs = 1.0 GSPS, input signal = –1 dBFS):
    fin=100MHz
  •       ENOB=8.2Bit
  •       SFDR=64.7dBFS
  •       SNR=51.4dBFS    
    fin = 248MHz
  •       ENOB=8.1Bit
  •       SFDR=62.6dBFS
  •       SNR=50.9dBFS
  fin = 498MHz
  •       ENOB=7.9Bit
  •       SFDR=63.3dBFS
  •       SNR=49.9dBFS
  fin = 750MHz
  •       ENOB=7.7Bit
  •       SFDR=63.9dBFS
  •       SNR=48.4dBFS

Applications:

    • Wideband communications
    • Data acquisition systems
    • Digital oscilloscopes
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